via-in-pad issue (standard technology)
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Author : meidear
Update time : 2020-03-10 16:51:49
DFM/DFA/DFT Tips&Tricks - TIP #03 => via-in-pad issue (standard technology)
Whenever possible, always use enough clearance for the solder mask between the via and the copper pad to prevent solder flow into the via hole and can cause the solderability issues during the assembly and manufacturing process.
This note applies only to standard technology, especially typical 2-layer PCBs.
Please remember, that for multilayer HDI PCBs there is a similar via-in-pad technique (mostly used for small pitch BGAs), but that vias are additionally filled and plated.
There are some exceptions, such as RF circuits, high-current designs or BGA layouts, where that recommendation can be omitted.
Whenever possible, always use enough clearance for the solder mask between the via and the copper pad to prevent solder flow into the via hole and can cause the solderability issues during the assembly and manufacturing process.
This note applies only to standard technology, especially typical 2-layer PCBs.
Please remember, that for multilayer HDI PCBs there is a similar via-in-pad technique (mostly used for small pitch BGAs), but that vias are additionally filled and plated.
There are some exceptions, such as RF circuits, high-current designs or BGA layouts, where that recommendation can be omitted.
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